Low Complexity High Performance Non-Binary QC-LDPC Decoding System

Non-binary LDPC code can achieve better error correcting performance than its binary counterpart especially when the code length is short or moderate. A novel Non-Binary LDPC code is presented in this paper to replace the traditional binary standard in 802.11n system. The proposed Parity Check Matrix (PCM) is optimized by eliminating short-girths and low weight code-words. Partially-parallel quasi-cyclic structure is adopted for the encoder and the check matrix is quasi diagonal line structure. Encoding process directly utilizes check matrix rather than generator matrix to generate check sequence. For decoding process, the (Forward Backward Extended Minimum Sum (FB-EMS) algorithm is adopted. The performance of the proposed Non-binary LDPC code over GF(16) shows more than 1dB coding gain at 10^(-6) BER compared to the traditional binary standard with same bit length for 802.11n standard. Encoder structure and decoder algorithm have been also presented. For practical purposes, this Non-binary quasi-cyclic LDPC code with low complexity makes our proposed system very attractive.

Quasi-cyclic, Forward Backward Extended Minimum Sum (FB-EMS), Non-binary LDPC

Sun shulong, Lin min, Low Complexity High Performance Non-Binary QC-LDPC Decoding System. 2019 Scientific Conference on Network, Power Systems and Computing (NPSC 2019), 2019: 147-151. DOI: https://doi.org/10.33969/EECS.V3.034.